Current: Single-cycle CPU based on the unprivileged RV32I ISA

Building an RV32I core with radiation-hardening features for use in defense technology. For now, the focus is on FPGA testing and toolchain support because the creation of the RTL files has been finished. If you are new to the HDL ecosystem, check out my blog post on how to start writing HDL as a total beginner.

Deferred: Rockets and space stuff

I would really like to start this area only when I am done with my CPU project. Looking forward to making flight computers that can contribute to nuclear fusion-powered engine research.